Here’s the circuit of a multi-switch input musical doorbell (shown in Fig.1). The circuit is built around the popular and less expensive quad D-latch CD4042B (IC1). When switch S6 is pushed to ‘on’ condition, the circuit gets +9V and the four data inputs (D1 through D4) of ICI are in low state because these are tied to ground via resistors R1 through R4. Polarity input (POL) pin 6 of IC1 isalso pulled down by resistor R5. Clock input pin 5) of the quad D-latch is wired in normally low mode and hence all the four outputs (Q0 through Q3) have the same states as their corresponding data inputs. As a result, LED1 through LED4 are in off condition.
Fig 1 :Multi-switch doorbell with indicators
There are four switches fitted at four different doors/gates outside the home and a monitoring panel (as shown in Fig. 2) in the common room of the home. If any Fig. 2: Suggested panel layout of musical doorbell switch S1 at door 1), pins 2 and 4 of IC1 go high. Simultaneously, pin 3 to IC1 (Q0 output) goes low and LED1 tarts glowing to indicate that switch S1 is pressed by someone. Next, output pin 13 of the dual 4-input NOR gate (IC2, here wired as a single 4-input OR gate) goes high to forward bias buzzerdriver transistor T1 via resistor R10.
Fig 2: Suggested panel layout of musical doorbell
The final result is a soft and pleasing musical bell, hich lasts until reset switch S5 is pressed by the owner. For this latching arrangement , output pin 13 of IC2 from the NOR gate is fed back to the clock input of IC1.switch is pressed by a visitor (for example, switch S1 at door 1), pins 2 and 4 of IC1 go high. Simultaneously, pin 3 to IC1 (Q0 output) goes low and LED1 starts glowing to indicate that switch S1 is pressed by someone. Next, output pin 13 of the dual 4-input NOR gate (IC2, here wired as a single 4-input OR gate) goes high to forward bias buzzerdriver transistor T1 via resistor R10. The final result is a soft and pleasing musical bell, which lasts until reset switch S5 is ressed by the owner. For this latching arrangement , output pin 13 of IC2 from the NOR gate is fed back to the clock input of IC1.